1. Field of the Invention
The present invention relates to an error controller for use in a debugging microprocessor having an external bus error detection function and a debug interrupt terminal.
2. Description of Related Art
Conventional microprocessors include microprocessors of the type provided with input terminals used for informing the microprocessor of an error in an external circuit. As one of the input terminals, a bus error input terminal for notifying a data transfer error in a data bus has been known.
In ordinary cases, when an error signal is inputted through the bus error terminal, a microprocessor causes an exception to occur, and branches into a bus error processing routine, so that a bus error processing is executed in a software manner. An address where the bus error has occurred is stored in a stack, and then, supplied to the bus error processing routine. In this case, if a bus error occurs again in the way of the bus error processing, the condition is judged to be irreversible or irrevocable, and therefore, the microprocessor is caused to stop the operation.
One typical example of conventional bus error controllers for use in a debugging microprocessor includes a bus error detecting circuit for sampling a bus error signal supplied through an external terminal at each bus cycle. When the bus error signal is detected, the bus error detecting circuit outputs an exception generation request signal, to an exception control circuit, and at the same time, activates a bus error status signal. In response to the exception generation request signal, the exception control circuit causes an exception to occur, so that the microprocessor branches into a bus error processing routine by saving a return address, PSW (program status word), an address of a bus error occurrence, and an exception code into a stack. When the bus error processing has been completed and the microprocessor returns from the bus error processing routine, the exception control circuit generates an active exception return signal to the bus error detection circuit in order to notify the completion of the bus error processing. In response to this active exception return signal, the bus error detection circuit inactivates the bus error status signal.
In addition, there is provided a double error detection circuit for monitoring the bus error status signal from the bus error detection circuit and the external bus error signal supplied through the external input terminal, and for stopping the operation of the debugging microprocessor when a bus error occurs again in the way of the bus error processing.
In the above mentioned conventional debugging microprocessor, an ordinary interrupt is inhibited after generation of the exception until completion of the exception processing.
In many cases, the above mentioned conventional debugging microprocessor has been incorporated in an in-circuit emulator. The in-circuit emulator has a function of stopping or breaking execution of a user program (break function) so that the control is moved to a monitor program by inputting a break request to a debug interrupt input terminal of the debugging microprocessor from an external circuit. This function is very effective in knowing and changing values in registers of the microprocessor at a desired time point. Since the debug interrupt is given the highest priority so as to be able to break at any arbitrary address, the break request is acknowledged or accepted even if the microprocessor is in the way of the exception processing.
In the conventional debugging microprocessor, therefore, it can be expected that a debug interrupt is requested or accepted in the way of a bus error processing routine performed after a bus error had occurred in the process of execution of a user program. This circumstance would easily occur in the case that a break point is set at a head of the bus error processing routine so that when a bus error occurs at any address a break is performed. When the debug interrupt is accepted, the control of the debugging microprocessor goes into the monitor program of the in-circuit emulator. However, since no relation exists between the bus error processing and the debug interrupt, the monitor program is executed as an extension of the bus error processing routine.
For example, in order to confirm an address of bus error occurrence, when a command is applied to cause to indicate the address of bus error occurrence, there will occur a bus error for the monitor program to access to the address of bus error occurrence. Since this bus error occurs before the microprocessor returns from the bus error processing routine, this bus error is regarded as a double bus error (a second bus error occurring in the way of the bus error processing), so that the operation of the microprocessor is stopped. As a result, the control cannot be moved into a bus error processing routine of the monitor program. Namely, a further debugging operation becomes impossible.